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Senior Design Verification Engineer

Cisco — Networking & security

Belgrade, Serbia Senior+ Posted Aug 4, 2026
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About the role

Join our team as a Senior Design Verification Engineer, specializing in ASIC functional verification for high-performance networking chips. Collaborate with global teams and engage in various development stages, ensuring complete verification coverage and enhancing DV environments. Your expertise in SystemVerilog and UVM will drive innovation in our projects.

What the index says about this role

  • First seen by JobLarper — Aug 5, 2026, 3 days ago. Still inside the window where applications get read by a human rather than a pile.
  • Cisco is hiring actively — 146 open roles indexed.

Derived from the 26,996 roles JobLarper indexes daily from official company boards — not from the job description above.

⚡ JobLarper watched this role appear on Cisco's official board on Aug 4, 2026. Sign up free to get alerted minutes after roles like this go live, and tailor your real résumé to the exact description — nothing invented.

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